A team of researchers has demonstrated a fully functioning 32-bit RISC-V processor built from molybdenum disulfide (MoS2), a two-dimensional semiconductor that forms a sheet barely thicker than a single atom. The work, described in a Nature publication, showcases RV32-WUJI, a processor that executes the full 32-bit RISC-V instruction set but operates at kilohertz clock speeds and relies on roughly six thousand transistors. While it cannot rival silicon in speed, the device represents a notable advance in beyond-silicon computing and highlights potential niche applications for ultra-low-power processing in simple sensors and other specialized tasks. The processor’s development reflects a broader effort to harness 2D materials for integrated circuits, balancing the challenges of molecular-scale electronics with the promise of unique advantages in specific use cases.
Background on 2D materials and MoS2 in electronics
Two-dimensional materials, which form atomic-scale sheets with highly ordered bond networks, have attracted significant attention for next-generation electronics. These materials share the property that their electronic behavior arises primarily from the arrangement of their constituent atoms and the associated orbital configurations, rather than from bulk properties that emerge in three-dimensional crystals. Among the family of 2D materials, graphene stands out for its exceptional conductivity, while molybdenum disulfide (MoS2) provides a contrasting and valuable semiconducting behavior.
In a graphene lattice, carbon atoms bond in a flat plane, yielding a material whose thickness effectively matches a single atomic layer. MoS2 differs because its bonding geometry introduces a slight out-of-plane angle, producing a zig-zag pattern that makes the sheet marginally thicker than its individual atoms. This structural distinction translates into markedly different electronic properties: graphene behaves as a conductor, whereas MoS2 behaves as a semiconductor. The electronic characteristics of these materials are intrinsic to their molecular orbital configurations, rather than arising from a bulk material with emergent properties. Alongside these fundamental properties, MoS2 has demonstrated utility in a range of demonstrator devices, including flash storage components and image sensors, illustrating its potential for diverse electronic applications.
In recent developments, researchers have achieved wafer-scale fabrication of MoS2 sheets on sapphire substrates, enabling more scalable integration with established manufacturing workflows. This capability is crucial for attempting to harmonize 2D-material devices with silicon-based technology, as it facilitates the prospect of integrating MoS2 devices with silicon support chips and other components within a conventional semiconductor ecosystem. The move toward wafer-scale MoS2 is a key step in transitioning from isolated lab-scale demonstrations to more practical, scalable production processes that could underpin specialized applications in which the unique properties of MoS2 offer advantages.
MoS2 as a semiconductor and its crystalline structure
MoS2 consists of layers of sulfur and molybdenum atoms arranged in a staggered hexagonal lattice. The arrangement yields a distinct electronic landscape compared with carbon-only graphene. In MoS2, the material functions as a semiconductor, with bandgap and threshold characteristics that enable transistor behavior suitable for digital logic. The material’s semiconducting nature makes it particularly appealing for devices that require controlled switching, such as transistors and logic gates, while its two-dimensional geometry can contribute to ultra-thin form factors and potential reductions in parasitic effects at the molecular scale.
The structural properties of MoS2 directly influence device performance. Unlike bulk silicon, where threshold voltages can be tuned by introducing dopants, a single MoS2 molecule does not permit impurity implantation in the way conventional silicon does. In the RV32-WUJI work, all transistors were n-type, and their performance could not be adjusted through conventional doping. To navigate this constraint, the researchers employed a strategy in which the wiring materials and wiring configurations themselves were used to tune each transistor’s threshold voltage, effectively modulating behavior through the interconnect topology rather than through dopant concentration. This approach reflects a fundamental shift in device engineering when working at the single-molecule scale, where traditional bulk-doping methods are not available.
The team also explored how the electrode materials used for connection influence transistor operation. They used two different metals, aluminum and gold, for wiring purposes and leveraged the choice of wiring material and embedding environment to adjust transistor thresholds. This electronics-level adjustment is essential to achieving functional circuits in a platform where conventional threshold tuning is not feasible. The result is a set of devices whose electrical properties can be steered via circuit-level design choices, bridging molecule-scale behavior with larger-system performance.
Wafer-scale MoS2 on sapphire and fabrication approach
A central challenge in 2D-material electronics lies in achieving wafer-scale sheets of MoS2 that are compatible with established fabrication techniques. The Nature publication reported progress in generating wafer-scale MoS2 sheets on sapphire substrates, a development that opened the door to constructing more complex integrated circuits using MoS2 while aligning with silicon-processing paradigms. The ability to grow or transfer MoS2 across an entire wafer makes it feasible to assemble larger circuits and to attempt integration with silicon components, a necessary step toward practical adoption of 2D-material platforms in mainstream manufacturing.
In the RV32-WUJI project, the team leveraged this wafer-scale MoS2 platform to build a 32-bit RISC-V processor that embodies nearly six thousand transistors. The intent was not merely to prove a trickle of functionality but to demonstrate that a complete, functional processor could be realized within the constraints and opportunities offered by MoS2-based electronics. The researchers acknowledged that the resulting chip operates at kilohertz clock speeds and that throughput is modest by silicon standards, but the achievement marks a meaningful advance in beyond-silicon semiconductor research, highlighting the potential of 2D materials to enable new computational paradigms for specific, low-power tasks.
From a manufacturing perspective, compatibility with silicon-processing techniques is an intentional design consideration. By aligning materials and process flows with existing semiconductor infrastructure, the MoS2 platform improves the prospects for scalable production and potential co-integration with conventional silicon devices. While more work remains to optimize yield, reliability, and performance, this approach underscores the practical pathway toward hybrid systems that exploit MoS2’s unique properties for targeted applications.
RV32-WUJI architecture: design choices and capabilities
The RV32-WUJI processor represents a dedicated exploration of a 32-bit RISC-V core implemented with MoS2 transistors. The design choice to pursue a full 32-bit RISC-V instruction set demonstrates the researchers’ aim to evaluate the viability of MoS2 for complete instruction-processing pipelines rather than just small, isolated operations. The processor’s architecture is engineered to support the rich instruction set of RISC-V, incorporating the necessary decoding and control logic to execute a wide array of instructions typical of a 32-bit RISC-V core.
Despite its status as a complete 32-bit processor, RV32-WUJI is deliberately designed to operate at modest clock rates. The device can perform addition across 32 bits, but it executes the operation in a bit-serial manner—processing one bit per cycle. As a result, a single 32-bit addition requires 32 clock cycles. The presence of on-board buffers is essential for storing intermediate results during the bit-serial arithmetic process, enabling proper sequencing and data retention as the operation unfolds. Such design choices reflect the realities of molecular-scale electronics, where parallelism and speed must be balanced against feasibility given the materials and fabrication constraints.
The processor’s transistor count sits around 5,900, a figure that sits in the vicinity of “nearly 6,000” transistors reported in the broader description of the platform. This transistor count supports a full 32-bit instruction pipeline, including a capable instruction decoder and the necessary logic to implement the RISC-V instruction set. The authors emphasize that this platform demonstrates the feasibility of building a complete, functioning RISC-V core from MoS2, even if it does not yet challenge silicon on core speed or energy efficiency. The focus is on proving thatMoS2-based electronics can accommodate a realistic and useful instruction set and that comparable complexity logic can be implemented within a 2D-material framework.
Transistor-level engineering: threshold tuning without doping
A pivotal challenge in MoS2-based transistors is the inability to perform conventional dopant implantation to modulate threshold voltages. In silicon technology, threshold tuning is commonly achieved through doping processes that alter carrier concentration and device behavior. In the MoS2-based RV32-WUJI platform, developers circumvented this limitation by manipulating other design variables to shape transistor performance. Specifically, the research team used two distinct metals—aluminum and gold—for wiring connections and carefully selected the embedding material and wiring configuration to influence the threshold voltage of each transistor.
This approach represents a shift from traditional bulk semiconductor methods toward circuit- and interconnect-level engineering to achieve the desired transistor behavior. By choosing different metals for wiring and by selecting materials for the wiring’s immediate environment, the researchers could adjust the devices’ electrical characteristics, effectively tuning transistors post-fabrication through electrical and structural design decisions rather than through substitutional doping. This methodology highlights a broader theme in low-dimensional electronics: device performance can be steered by integrating materials science with circuit-level design, leveraging the unique properties of interconnects to optimize overall system behavior.
The broader implication of this technique is that a 2D-material processor can be tailored for particular performance envelopes by selecting wiring materials and surrounding dielectrics that influence transistor thresholds. While this approach may limit uniformity and yield growth in large-scale manufacturing, it demonstrates a practical pathway to functional circuits within the current molybdenum disulfide framework. The success of RV32-WUJI in implementing a reliable 32-bit instruction set under these constraints serves as proof of concept for future work that could refine interconnect-based tuning and possibly enable more scalable architectures.
Chip design, testing, and circuit validation
To translate the MoS2-based devices into a functioning chip, researchers embarked on a systematic exploration of a wide range of device configurations. They fabricated and tested numerous transistor-level devices to identify robust and repeatable operating conditions, then integrated the most promising candidates into a complete chip design. At the device level, markets of depletion-mode inverters were used as building blocks—a choice that aligns with certain MoS2 transistor characteristics and available fabrication techniques. The team developed and evaluated a comprehensive suite of 25 logic gates, testing each gate’s performance to determine whether it could form a coherent and functioning set for constructing usable circuits.
The results of these tests revealed that 18 of the 25 gates were functional, providing a workable logic set from which the researchers could assemble the RV32-WUJI processor. The process then involved selecting the optimal combination of gates, wiring strategies, and materials to ensure that the chip’s logic could operate within the desired performance envelope. Using the longest path through the chip as a metric to determine delay constraints, the researchers established a clock-speed ceiling in the kilohertz range. This approach reflects a careful design discipline in which worst-case delays across the critical path set the bound on operating frequency, ensuring reliable operation for the whole processor under realistic conditions.
Yield measurements are a critical indicator of manufacturability and scalability. The team reported an overall chip yield exceeding 99.9%, with a chip-level yield of 99.8%. While these yields are impressive for a novel 2D-material processor, some components experienced substantial challenges. In particular, eight-bit registers showed a yield of about 71%, and when extended to 64-bit registers, the yield dropped dramatically to around 7%. The 64-bit register in this architecture requires 1,152 transistors, illustrating how scaling up logical width imposes substantial reliability demands on the underlying manufacturing process.
The resulting processor architecture comprises roughly 5,900 transistors, capable of fully implementing the 32-bit RISC-V instruction set. This architecture inherently includes a sophisticated instruction decoder and control circuitry necessary to support diverse instructions. Yet certain design choices keep some aspects intentionally simple. For example, the processor’s addition of two 32-bit values is performed serially, requiring 32 clock cycles, and the design relies on on-board buffers to retain intermediate results. This combination of full instruction-set capability with bit-serial arithmetic parallels the constraints and opportunities associated with molecular-scale electronics, where high-speed parallelism remains a challenge, but functional versatility remains achievable.
Performance, limitations, and early conclusions
The RV32-WUJI demonstration makes clear that MoS2-based processors can realize a complete 32-bit instruction set—even if the performance remains constrained by current materials and fabrication limits. The processor operates in the kilohertz clock-range, a rate that is orders of magnitude slower than contemporary silicon-based processors. Nonetheless, this performance level is sufficient to prove the feasibility of building practical, albeit specialized, computational cores from 2D materials. The combination of a full RISC-V instruction set with a transistor count approaching six thousand underscores the architectural maturity that can be achieved within MoS2’s limits.
In terms of capabilities, RV32-WUJI highlights several notable attributes. The use of depletion-mode inverters and carefully chosen interconnect strategies establishes that functional circuitry can be realized in a MoS2-based platform. The design demonstrates that the MoS2 transistor ecosystem can support basic arithmetic and control logic at the 32-bit level, even if the execution speed is modest by silicon standards. The on-chip buffers and serial execution of multi-bit operations illustrate how data can be staged and processed within the device’s constraints to accomplish meaningful computation.
The research team frames their work as a foray into beyond-silicon hardware that could fulfill niche needs where ultra-low power and compact form factors are paramount. Potential applications may include ultra-low-power processing for simple sensors or other scenarios where the energy budget dominates the design criteria. While the team does not anticipate that this MoS2-based approach will replace conventional silicon in mainstream computing, they see a complementary role for such devices in specialized applications. The evolving landscape of 2D-material electronics could enable new performance envelopes and design philosophies that leverage the peculiar advantages of molecular-scale semiconductors.
Nonetheless, several constraints and challenges remain. The kilohertz operating regime remains a fundamental limitation for general-purpose computation, particularly compared with silicon-based cores that operate at gigahertz scales or higher. Achieving higher yields for wider data paths (8-bit, 16-bit, 64-bit, etc.) will be necessary for broader adoption and more complex applications. The process of aligning MoS2 electronics with established silicon manufacturing must continue to be refined to ensure robust production and long-term reliability. Finally, the field must explore how 2D materials can be integrated with conventional silicon components to deliver meaningful system-level benefits without sacrificing manufacturability.
Challenges, niches, and potential pathways forward
The journey toward enabling practical MoS2-based computing systems faces several key challenges that researchers must address to unlock broader adoption. One major obstacle is the inherent trade-off between achieving complete transistor-level control and maintaining high fabrication yields, particularly for large-scale and high-bit-width architectures. While the RV32-WUJI chip demonstrates a functional 32-bit core, the relatively low yield for 64-bit registers indicates significant reliability hurdles when scaling up bit-width. Overcoming these hurdles will likely require innovations in materials science, device engineering, and interconnect design that can stabilize transistor behavior across larger, more complex circuits.
Another pivotal challenge is speeding up the MoS2-based processor without sacrificing its unique advantages. The kilohertz clock speeds achieved in the current demonstration are valuable for ultra-low-power sensing and embedded applications, yet insufficient for general-purpose computing or real-time processing tasks that demand higher throughput. Advancements in MoS2 synthesis, device engineering, and packaging could push clock speeds higher, but any increase must be balanced against the potential impact on yield, reliability, and energy efficiency. The continued exploration of interconnect tuning—via choice of wiring materials and embedding substances—will remain a central theme in optimizing device performance within the MoS2 framework.
From a system integration perspective, the possibility of hybrid architectures—where MoS2-based cores coexist with silicon components—presents a compelling path forward. The demonstrated compatibility with silicon manufacturing processes suggests that MoS2 devices could be co-integrated with traditional silicon logic and memory, enabling new classes of hybrid systems that exploit MoS2’s strengths for specific tasks while leveraging silicon for high-speed computation and communication. Such hybrid architectures could be especially advantageous for ultra-low-power subsystems, sensor networks, or edge devices requiring compact form factors, long battery life, and targeted computational capabilities.
To maximize the impact of MoS2-based processors, researchers will also need to deepen their understanding of device-to-device variation and environmental sensitivity. Molecular-scale devices can exhibit greater variability than bulk semiconductors due to stochastic effects, surface states, and interaction with the surrounding environment. Addressing these variability concerns will require robust manufacturing controls, more precise material processing, and possibly design strategies that accommodate variability through redundancy, architectural choices, or error-tolerant computation. Ultimately, the maturation of MoS2 electronics will hinge on a combination of materials science breakthroughs, process improvements, and clever circuit design that leverages the distinctive properties of two-dimensional semiconductors.
Implications for beyond-silicon computing and research directions
The RV32-WUJI project offers a compelling glimpse into the potential role of MoS2 and other two-dimensional materials in the future of computing. While not poised to supplant silicon in mainstream, high-performance computing, MoS2-based devices may fill specialized niches where ultra-low power, compact size, or unique packaging constraints are paramount. The ability to build a functional 32-bit processor with a relatively small transistor count demonstrates that molecule-scale electronics can reach meaningful levels of computational capability, expanding the horizon of what is possible with 2D materials.
Beyond immediate applications, the research informs broader trajectories in materials science and nanofabrication. The demonstration of wafer-scale MoS2 on sapphire, coupled with processor-level implementation, provides a concrete reference point for pursuing more ambitious designs that push the limits of molecular electronics. The study also highlights the importance of integrating materials choices with circuit-level design to achieve functional outcomes—an approach that could guide future work in 2D-material logic, memory, and mixed-signal systems. As researchers continue to refine MoS2 synthesis, device engineering, and interconnect strategies, the boundary between laboratory demonstrations and practical, deployable technology could gradually shift toward more sophisticated, reliable, and scalable MoS2-enabled systems.
The broader scientific and engineering communities will likely monitor developments in 2D materials-based processors with keen interest. The potential to tailor transistor behavior through interconnects and embedding environments introduces a rich design space for future work. If success accrues across multiple MoS2-based devices and circuits, researchers may discover new paradigms for ultra-compact, ultra-low-power computation that complement existing silicon-based architectures. The journey from this milestone toward practical, widespread use will require sustained collaboration across materials science, electrical engineering, and computer architecture, with careful attention to manufacturability, reliability, and system-level benefits.
Potential applications, use cases, and market outlook
The demonstrated MoS2-based RV32-WUJI processor is best positioned for niche applications where ultra-low power consumption and minimal physical footprint trump raw speed. Sensor networks, environmental monitoring devices, and other embedded systems that operate under strict energy budgets could benefit from a compact, electronics-efficient core that consumes minimal power while performing essential 32-bit instructions. The ability to integrate MoS2 devices onto sapphire-based substrates and to align process flows with silicon manufacturing signals potential for hybrid strategies, where MoS2 cores handle low-power tasks or pre-processing, while silicon cores handle throughput-intensive workloads.
This duality of capabilities could lead to new system-on-chip configurations, wherein a MoS2-based processor handles specific control and data-mining tasks, complemented by conventional silicon processors that execute high-speed computations. The unusual properties of 2D materials may also inspire novel packaging and cooling strategies, given the possibility of integrating ultra-thin devices with unconventional form factors. Additionally, the research underscores the importance of interconnect engineering and material choices in achieving desired transistor behavior, suggesting that future MoS2 devices could benefit from tailored interconnect architectures that optimize energy efficiency and performance in ways not widely explored in traditional silicon technology.
As the field advances, researchers will need to address the practicalities of large-scale manufacturing, yield optimization, and reliability under real-world operating conditions. The transition from laboratory demonstrations to commercial products will require breakthroughs in material uniformity, defect control, and long-term stability. Nonetheless, the RV32-WUJI achievement supplies a concrete proof point that MoS2 and other 2D materials can realize functional, complete processors, and it invites ongoing exploration of how such technologies can complement, rather than replace, established silicon-based computing ecosystems.
Conclusion
The creation of RV32-WUJI marks a landmark in the exploration of beyond-silicon computation using two-dimensional materials. By constructing a fully functional 32-bit RISC-V processor from molybdenum disulfide on a wafer-scale platform, researchers have demonstrated that molecular-scale semiconductors can support complete instruction sets, relevant control logic, and coherent circuit operation, albeit at kilohertz clock speeds. The project achieves an integrated design with roughly 5,900 transistors—nearly 6,000 in total—and shows that the full 32-bit RISC-V instruction set can be realized through careful interconnect engineering, metal wiring choices, and material embedding strategies when conventional doping is not feasible.
The results underscore both the potential and the current limitations of MoS2-based electronics. While not positioned to replace silicon-level performance, MoS2-based processors can play a meaningful role in ultra-low-power, niche applications where size, power, and integration with silicon systems are decisive. The work emphasizes the value of wafer-scale MoS2 fabrication on sapphire substrates and the importance of aligning 2D-material devices with existing semiconductor manufacturing workflows to pave the way for hybrid architectures capable of delivering novel capabilities. As researchers continue refining device physics, interconnect strategies, and process integration, the scope of MoS2 and other 2D materials in computing could broaden, unlocking new opportunities for compact, energy-efficient, and purpose-built computational platforms.
